MIPS

RISC vs CISC

Reduced Instruction Set Computer vs Complex Instruction Set Computer

RISC	CISC
fixed size instructions	variable size instructions (requires decode before fetch)
fixed format	variable format (complex decode)
operations only with registers	in-memory operands
many registers	few of registers
single access to memory	multiple accesses to memory
fixed instruction duration	variable instruction duration
simple conflicts	complex conflicts
faster pipeline	complex pipeline

Registers

name	number	use	keep
$zero ∣0∣0 co n s t an t ∣ ? ∣∣$ at	1	reserved for assembler	?
$v 0 -$ v1	2 - 3	expression evaluation and results of functions	no
$a 0 -$ a3	4 - 7	arguments	no
$t 0 -$ t7	8 - 15	temporary	no
$s 0 -$ s7	16 - 23	saved temporary	yes
$t 8 -$ t9	24 - 25	temporary	no
$k 0 -$ k1	26 - 27	reserved for OS Kernel	?
$g p ∣28∣ g l o ba lp o in t er ∣ yes ∣∣$ sp	29	stack pointer	yes
$f p ∣30∣ f r am e p o in t er ∣ yes ∣∣$ ra	31	return address	yes

Special registers

$g p * * p o in t s in t o t h e mi dd l eo f a * * 64 K b l oc k * * o f m e m ory in t h e * * h e a p * * t ha t h o l d sco n s t an t s an d * * g l o ba l v a r iab l es * * - * *$ sp points to the last location in use on the stack
$f p * * p o in t s t o t h es t a r t o f t h es t a c k f r am e an dd oes n o t m o v e f or t h e d u r a t i o n o f t h es u b ro u t in ec a ll, an d t h e p a r am e t ers t ha t a re p a sse d in t o t h es u b ro u t in ere maina t a co n s t an t s p o t re l a t i v e t o t h e f r am e p o in t er - * *$ ra is written with the return address for a call by the jal instruction

Instructions

R-type Instructions

Arithmetic Instruction Format (type to a register)

add $t0, $s1, $s2

add opcode $\to$ 000000
$t 0 in * * r d * * (\to) 01000 -$ s1 in rs, $\to$ 10001
s2 in rt, $\to$ 10010
add funct $\to$ 100000

op	rs	rt	rd	shamt	funct
000000	10001	10010	01000	00000	100000
6b	5b	5b	5b	5b	6b
opcode	first register source	second register source	register destination operand	shift amount	function code

I-type Instructions

Data Transfer Format (conditional jumps)

addi t2, <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8889em;vertical-align:-0.1944em;"></span><span class="mord mathnormal">s</span><span class="mord">2</span><span class="mpunct">,</span><span class="mspace" style="margin-right:0.1667em;"></span><span class="mord">4‘‘‘</span><span class="mspace" style="margin-right:0.2222em;"></span><span class="mbin">−</span><span class="mspace" style="margin-right:0.2222em;"></span></span><span class="base"><span class="strut" style="height:0.6944em;"></span><span class="mord mathnormal">a</span><span class="mord mathnormal">dd</span><span class="mord mathnormal">i</span><span class="mspace" style="margin-right:0.2222em;"></span><span class="mbin">∗</span><span class="mspace" style="margin-right:0.2222em;"></span></span><span class="base"><span class="strut" style="height:0.8889em;vertical-align:-0.1944em;"></span><span class="mord">∗</span><span class="mord mathnormal">o</span><span class="mord mathnormal">p</span><span class="mord mathnormal">co</span><span class="mord mathnormal">d</span><span class="mord mathnormal">e</span><span class="mspace" style="margin-right:0.2222em;"></span><span class="mbin">∗</span><span class="mspace" style="margin-right:0.2222em;"></span></span><span class="base"><span class="strut" style="height:0.4653em;"></span><span class="mord">∗</span></span><span class="mspace newline"></span><span class="base"><span class="strut" style="height:1em;vertical-align:-0.25em;"></span><span class="mopen">(</span><span class="mrel">→</span></span><span class="mspace newline"></span><span class="base"><span class="strut" style="height:1em;vertical-align:-0.25em;"></span><span class="mclose">)</span><span class="mord">001000</span><span class="mord">−</span></span></span></span>t2 in **rt** \\(\to\\) 01010
- s2 in **rs** \\(\to\\) 10010

| op | rs | rt | constant |
|:--:|:--:|:--:|:--:|
| 001000 | 10010 | 01010 | 0000000000000100 |
| 6b | 5b | 5b | 16b |
| opcode | first <br/> register | target <br/> register | constant value or <br/> address | 

<!-- | \\(0..5\\) | \\(6..10\\) | \\(11..15\\) | \\(16..31\\) | -->

### J-type Instructions

Unconditional Jumps

```armasm
j label

PC $\leftarrow$ label $\cdot$ 4

op	address
001000	10010010100000000000000100
6 bit	26 bit

FR-type Instructions

MIPS handles floating point instructions like regular 32b instructions. FR-type don't access the memory, and are executed by the FPU.

add.s f0, <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8889em;vertical-align:-0.1944em;"></span><span class="mord mathnormal" style="margin-right:0.10764em;">f</span><span class="mord">1</span><span class="mpunct">,</span></span></span></span>f2 ; single precision
div.d <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8889em;vertical-align:-0.1944em;"></span><span class="mord mathnormal" style="margin-right:0.10764em;">f</span><span class="mord">0</span><span class="mpunct">,</span></span></span></span>f2, f4 ; double precision

op	rs	rt	rd	shamt	funct
000000	10001	10010	01000	00000	100000
6b	5b	5b	5b	5b	6b
opcode	first register source	second register source	register destination operand	shift amount	function code

FI-type Instructions

FI-type are used for:

load / store
conditional jumps

lwc1 f1, indirizzo
bc1f cc, offset

op	rs	rt	constant
001000	10010	01010	0000000000000100
6b	5b	5b	16b
opcode	first register	target register	constant value or address

Interrupts

TODO: Interrupts

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